hlsfactory.flow_intel

Module Contents

Classes

DesignHLSSynthData
IntelHLSDesign
IntelHLSSynthFlow
IntelImpDesignResource
IntelQuartusImplFlow

API

class hlsfactory.flow_intel.DesignHLSSynthData

resources_ALUTs_used: int = None

resources_FFs_used: int = None

resources_RAMs_used: int = None

resources_DSPs_used: int = None

resources_MLABs_used: int = None

resources_ALUTs_avail: int = None

resources_FFs_avail: int = None

resources_RAMs_avail: int = None

resources_DSPs_avail: int = None

resources_MLABs_avail: int = None

classmethod parse_from_synth_report_file(data_file: pathlib.Path) → hlsfactory.flow_intel.DesignHLSSynthData

class hlsfactory.flow_intel.IntelHLSDesign

name: str = None

target_clock_period: None | str = None

family: str = None

product: str = None

quartus: str = None

time: str = None

version: str = None

classmethod parse_from_synth_report_file(info_json: pathlib.Path, summary_json: pathlib.Path) → hlsfactory.flow_intel.IntelHLSDesign

class hlsfactory.flow_intel.IntelHLSSynthFlow(ipp_bin: str | None = None, arch: str = '1ST110EN1F43E1VG', clock: str = '10ns', verbose: bool = True)

Bases: hlsfactory.framework.ToolFlow

name = 'IntelHLSSynthFlow'

execute(design: hlsfactory.framework.Design, timeout: float | None = None) → list[hlsfactory.framework.Design]

class hlsfactory.flow_intel.IntelImpDesignResource

name: str = None

clock_unit: str | None = None

clock: float | None = None

clock1x: float | None = None

alm: float = None

reg: int = None

dsp: int = None

ram: int = None

mlab: int = None

classmethod parse_from_impl_report_file(quartus_json: pathlib.Path) → hlsfactory.flow_intel.IntelImpDesignResource

class hlsfactory.flow_intel.IntelQuartusImplFlow(quartus_bin: str | None = None, verbose: bool = True)

Bases: hlsfactory.framework.ToolFlow

name = 'IntelQuartusImplFlow'

execute(design: hlsfactory.framework.Design, timeout: float | None = None) → list[hlsfactory.framework.Design]